Power and Area Trade-Off for Accuracy-Controlled Multiplier for Image Compression Using DCT

Approximate computing pervades for different error-tolerant applications to accomplish low-power and higher frequency. A programmable accuracy-controlled multiplier (ACM) is proposed to control the accuracy by generating partial products. The accuracy will be controlled by setting up the control bits to mux out the actual multiplier and/or approximate multiplier out. The trade-off in power and area is observed at different error rate. The experiment is demonstrated for image compression using discrete cosine transform (DCT) method to measure the SNR for standard cameraman gray image. This work is resulted with mean error distance (MED) of 3.12 and 23.825 dB SNR. The core logic resulted in maximum 31.63% reduction in static power and 7.48% reduction in critical path delay for approximate multiplier. The core area is reduced up to 27.79%, and an improvement in SNR is achieved up to 3.44% at a cost of 20.84% area over head while synthesized using 45 nm.