Distribution optimization of thermal through-silicon via for 3D chip based on thermal-mechanic coupling

This study establishes a unit cell model of thermal-mechanical coupling of 3D chip thermal through-silicon via (TTSV), and conducts optimization study under the constraints of the given ratio of total unit cell volume to TTSV volume. A single-degree-of-freedom optimization study with TTSV spacing as the design variable was first carried out to analyze the impact laws of heat flow density in the hot spot region, TTSV filling material and volume share on the optimal structure and maximum temperature. The results of the two-degree-of-freedom optimization with TTSV spacing and TTSV array rotation angle as design variables were further investigated to determine the distribution of thermal stresses. The maximum temperature of the cell decreases and then increases with the increase in the TTSV pitch, regardless of the rotation angle of the TTSV array, and there exists a minimum value. The higher the temperature, the higher the thermal stress. Thermal stress is always concentrated in the inner and edge regions of the TTSV.