Hardware-Software Co-Design of an Audio Feature Extraction Pipeline for Machine Learning Applications

被引:0
|
作者
Vreca, Jure [1 ,2 ]
Pilipovic, Ratko [3 ]
Biasizzo, Anton [1 ]
机构
[1] Jozef Stefan Inst, Ljubljana 1000, Slovenia
[2] Jozef Stefan Int Postgrad Sch IPS, Ljubljana 1000, Slovenia
[3] Univ Ljubljana, Fac Comp & Informat Sci, Ljubljana 1000, Slovenia
关键词
FPGA; MFCC; keyword spotting; chisel;
D O I
10.3390/electronics13050875
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Keyword spotting is an important part of modern speech recognition pipelines. Typical contemporary keyword-spotting systems are based on Mel-Frequency Cepstral Coefficient (MFCC) audio features, which are relatively complex to compute. Considering the always-on nature of many keyword-spotting systems, it is prudent to optimize this part of the detection pipeline. We explore the simplifications of the MFCC audio features and derive a simplified version that can be more easily used in embedded applications. Additionally, we implement a hardware generator that generates an appropriate hardware pipeline for the simplified audio feature extraction. Using Chisel4ml framework, we integrate hardware generators into Python-based Keras framework, which facilitates the training process of the machine learning models using our simplified audio features.
引用
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页数:14
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