Minimization of Electrical Signal Interference with Appropriate Core Material for 3D IC at THz Applications

The increasing need for smaller, quicker devices that can perform new functions is driving researchers to strictly adhere to Moore's law. To boost operating speed, the industry has gone to great measures to create devices that are as tiny as feasible. Accumulating the number of devices per unit area is the primary goal. Researchers are actively focusing on decreasing the delay caused by the interconnects in order to improve circuit performance. Therefore, the understanding of three-dimensional Integrated Circuit (3D IC) knowledge was established, which is appropriate for stacking active devices together and creating vertical interconnections, in order to reduce delay and shorten interconnects. In 3D IC, electrical interference is a significant worry. In order to relieve worries about electrical signal interference, a number of scientists have developed and evaluated a variety of materials, including TSVs and substrates. This work presents a novel approach to reduce noise coupling using a large number of electrical interference models. Additionally, this work provides both stacked and single liner structures using BCB as the dielectric material for different kinds of core materials. The system performance is greatly improved and a paradigm change is ushered in by the 22% reduction in electrical interference from signal carrying TSVs (aggressive TSVs) to victim TSVs, even at higher THz frequencies.