A novel joint segmentation approach for wafer surface defect classification based on blended network structure

Efficient management and control of wafer defects are paramount in enhancing yield in IC chip manufacturing. Scanning Electron Microscope imagery of wafer surfaces, however, presents a challenge due to complex backgrounds and a minimal presence of actual defects. This complexity often hampers traditional convolutional neural networks tasked with defect classification and segmentation, making them prone to disturbances from background elements. To address this issue, we introduce a novel interwoven network architecture that synergizes convolution and Transformer models. This integrated approach is specifically designed to surmount the dual challenges of classification and joint segmentation in wafer defects, achieving a balance between computational efficiency and prediction accuracy. Our research, grounded in real-world production line data from IC chip manufacturing, demonstrates that our network attains a segmentation accuracy of 83.15% and a classification accuracy of 96.88%. The proposed method for automatic defect information extraction is shown to be viable for industrial application. The merger of convolutional neural networks with Transformer models in this innovative architecture shows considerable promise for enhancing wafer defect analysis, thereby improving the precision of defect classification and segmentation in semiconductor manufacturing processes.