Aspect Ratio Modeling of Radiation-Hardened 8-Shape Enclosed Layout Transistor

被引:0
|
作者
Wu, Yucao [1 ]
Luo, Ping [1 ]
Zhang, Bo [1 ]
机构
[1] Univ Elect Sci & Technol China UESTC, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Peoples R China
关键词
Logic gates; MOS devices; Layout; Radiation hardening (electronics); Standards; Transistors; Leakage currents; 8-shape enclosed layout transistor (ELT); aspect ratio modeling; leakage current; radiation hardening by design (RHBD); total ionizing dose (TID); CMOS TECHNOLOGIES; CIRCUITS;
D O I
10.1109/TNS.2023.3274389
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The leakage current caused by the total ionizing dose (TID) effect remains a challenge for deep submicrometer technologies. The enclosed layout transistor (ELT) nMOS using the radiation hardening by design (RHBD) technique has a great potential for TID radiation hardening. Compared with the b-shape ELT that has a clear limitation on its aspect ratio, 8-shape ELT is preferable in the circuit design. The aspect ratio modeling of 8-shape ELT is proposed in this work for the first time. The basic principle is based on the 8-shape ELT equivalent circuit, composing one main transistor and two edge transistors. In accordance with the Sentaurus simulation result, the equivalent trapezium approximation is made for the edge transistor. A semiempirical parameter is given to calculate the proposed model. The model is verified by the comparison between the measured results of the fabricated 8-shape ELT in a 180-nm CMOS process and the pure calculation results. A further discussion is made to improve the accuracy of the proposed model, which is approved by the comparison between different models in previous work. Some modifications are also made to adjust the 8-shape ELT before the application.
引用
收藏
页码:2076 / 2084
页数:9
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