Terminal Voltage and Common Mode Voltage Analysis for Various PV Inverter Topologies

被引:0
|
作者
Aggarwal, Surbhi [1 ]
Pal, Ravi [1 ]
Singh, Amit Kumar [1 ]
机构
[1] Natl Inst Technol Delhi, Dept Elect & Elect Engn, Delhi, India
关键词
cascaded multilevel topologies; converter topologies; inverter topologies; leakage current; PV array; PWM technique; LEAKAGE CURRENT; TRANSFORMERLESS; REDUCTION;
D O I
10.1080/15325008.2023.2283561
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The switching function method is critical for understanding the effect of different switching mechanisms or Pulse Width Modulation (PWM) designs on both terminal voltage and common mode voltage. The switching patterns of numerous five-level inverter topologies are determined using modified PWM in this study. The switching function technique is used in this study to investigate the terminal voltage of the PV array and the common mode voltage of the inverter. Notably, as compared to normal PWM approaches, five-level common mode voltage source inverters (CMLIs) need less carrier waves. The study gives thorough insights into the overall architecture of the examined converter, as well as terminal and common mode voltage expressions. When compared to normal PWM, any five-level CMLI requires less carrier waves. This document also details the converter's overall structure, terminal and common mode voltage expressions, and switching patterns.
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页数:16
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