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- [2] Bridging Pre-Silicon Verification and Post-Silicon Validation PROCEEDINGS OF THE 47TH DESIGN AUTOMATION CONFERENCE, 2010, : 94 - 95
- [3] An Assessment of Sample Preparation Challenges in 3D Stacked Integrated Circuit Devices for Post-Silicon Verification and Validation 2023 IEEE PHYSICAL ASSURANCE AND INSPECTION OF ELECTRONICS, PAINE, 2023, : 152 - 158
- [4] A Unified Methodology for Pre-Silicon Verification and Post-Silicon Validation 2011 DESIGN, AUTOMATION & TEST IN EUROPE (DATE), 2011, : 1590 - 1595
- [5] An integrated flow from pre-silicon simulation to post-silicon verification PRIME 2006: 2ND CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONIC AND ELECTRONICS, PROCEEDINGS, 2006, : 205 - +
- [6] Mismatch Circuit Aging Modeling and Simulations for Robust Product Design and Pre-/Post-Silicon Verification 2016 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2016,
- [7] Post-Silicon Validation of Yield-Aware Analog Circuit Synthesis 2019 16TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD 2019), 2019, : 245 - 248
- [8] Interconnection Fabric Design for Tracing Signals in Post-Silicon Validation DAC: 2009 46TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2009, : 352 - 357
- [10] Regression simulation: Applying path-based learning in delay test and post-silicon validation DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2004, : 692 - 693