Bit-Width Optimized Transposition Buffer Design for the AV1 2D-DCT Transform

被引:0
|
作者
Rodrigues, Jelson [1 ]
Goebel, Jones [1 ]
Agostini, Luciano [1 ]
Zatt, Bruno [1 ]
Porto, Marcelo [1 ]
机构
[1] Fed Univ Pelotas UFPel, Video Technol Res Grp ViTech, Pelotas, RS, Brazil
关键词
Video Coding; AV1; Transform; Transposition Buffer; Hardware Design;
D O I
10.1109/SBCCI62366.2024.10704001
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The Discrete Cosine Transform (DCT) is widely employed in video coding to reduce the amount of energy in a block of samples, leading to better compression efficiency. The 2D-DCT can be implemented using two 1D-DCTs by employing the separability property of the DCT transform. However, this approach demands a transposition buffer to store the first 1D-DCT coefficients, which requires a large area and high power dissipation in hardware implementation. The AV1 transposition buffer requires a storage capacity of 4096 coefficients of 16 bits each. This paper evaluates the bit width of 1D coefficients over the transposition buffer and proposes an optimized transposition buffer for the AV1 2D-DCT transform. Our synthesis results indicate that the proposed bit-width optimized transposition buffer achieves a reduction of 26.33% in area and 15.86% in power dissipation when compared to the baseline transposition buffer of the AV1 2D-DCT. The proposed approach can be applied to other transforms of AV1 and also to other encoders, which can extend the impacts of the proposed approach beyond the 2D-DCT of AV1.
引用
收藏
页码:210 / 214
页数:5
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