A Resource-Efficient Weight Quantization and Mapping Method for Crossbar Arrays in ReRAM-based Computing-in-Memory Systems

被引:0
|
作者
Ma, Mingyuan [1 ]
Jiang, Wei [1 ]
Liu, Juntao [2 ]
Dui, Li [1 ]
Ma, Zhongyuan [1 ]
Du, Yuan [1 ]
机构
[1] Nanjing Univ, Elect Sci & Engn, Nanjing, Peoples R China
[2] China Mobile Res Inst, Beijing, Peoples R China
关键词
ReRAMs; Compute in-Memory; Weight Mapping; Quantization; Spectral clustering;
D O I
10.1109/APCCAS62602.2024.10808813
中图分类号
学科分类号
摘要
Resistance Random Access Memory (ReRAM) crossbar arrays have been used in compute in-memory (CIM) application owing to its high bit-density, non-volatility, and capability to perform multiply-accumulate (MAC) calculations efficiently. The expansion of the size of the crossbars has led to the emerging challenge of high IR voltage drop and more complex logic control devices. In this paper, we propose two complementary weight quantization-mapping methods to solve this problem at high and low bits, respectively. The proposed method utilizes group quantization for clustering to merge weights in higher bits and leverages differential properties to conduct spectral clustering for merging weights in lower bits. Experimental results demonstrate significant savings in crossbar resources (45%) with minimal precision loss (less than 2%). Morover, We designed a carrier board-FPGA testing platform and deployed a neural network on a 32 x 32 size ReRAM crossbar. The results show that the proposed algorithm saves 42% of units, and the recognition accuracy of the MNIST dataset is within an acceptable range (91.5% to 88.3%).
引用
收藏
页码:169 / 173
页数:5
相关论文
共 18 条
  • [1] A Relaxed Quantization Training Method for Hardware Limitations of Resistive Random Access Memory (ReRAM)-Based Computing-in-Memory
    Wei, Wei-Chen
    Jhang, Chuan-Jia
    Chen, Yi-Ren
    Xue, Cheng-Xin
    Sie, Syuan-Hao
    Lee, Jye-Luen
    Kuo, Hao-Wen
    Lu, Chih-Cheng
    Chang, Meng-Fan
    Tang, Kea-Tiong
    IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS, 2020, 6 (01): : 45 - 52
  • [2] An Energy-Efficient Mixed-Bit ReRAM-based Computing-in-Memory CNN Accelerator with Fully Parallel Readout
    Liu, Dingbang
    Mao, Wei
    Zhou, Haoxiang
    Liu, Jun
    Wu, Qiuping
    Hong, Haigiao
    Yu, Hao
    2022 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS, 2022, : 515 - 519
  • [3] Leader: Accelerating ReRAM-based Main Memory by Leveraging Access Latency Discrepancy in Crossbar Arrays
    Zhang, Hang
    Xiao, Nong
    Liu, Fang
    Chen, Zhiguang
    PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2016, : 756 - 761
  • [4] Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing
    Bhattacharjee, Debjyoti
    Tavva, Yaswanth
    Easwaran, Arvind
    Chattopadhyay, Anupam
    IEEE TRANSACTIONS ON COMPUTERS, 2020, 69 (05) : 734 - 748
  • [5] Efficient in-memory computing architecture based on crossbar arrays
    Chen, Bing
    Cai, Fuxi
    Zhou, Jiantao
    Ma, Wen
    Sheridan, Patrick
    Lu, Wei D.
    2015 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2015,
  • [6] Improving DNN Fault Tolerance using Weight Pruning and Differential Crossbar Mapping for ReRAM-based Edge AI
    Yuan, Geng
    Liao, Zhiheng
    Ma, Xiaolong
    Cai, Yuxuan
    Kong, Zhenglun
    Shen, Xuan
    Fu, Jingyan
    Li, Zhengang
    Zhang, Chengming
    Peng, Hongwu
    Liu, Ning
    Ren, Ao
    Wang, Jinhui
    Wang, Yanzhi
    PROCEEDINGS OF THE 2021 TWENTY SECOND INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2021), 2021, : 135 - 141
  • [7] On the Control of Computing-in-memory Devices with Resource-efficient Digital Circuits towards their On-chip Learning
    Kaneko, Tatsuya
    Momose, Hiroshi
    Suwa, Hitoshi
    Ono, Takashi
    Hayata, Yuriko
    Kouno, Kazuyuki
    Asai, Tetsuya
    IEICE NONLINEAR THEORY AND ITS APPLICATIONS, 2023, 14 (04): : 639 - 651
  • [8] A Compilation Framework for SRAM Computing-in-Memory Systems With Optimized Weight Mapping and Error Correction
    Bai, Yichuan
    Li, Yaqing
    Zhang, Heng
    Jiang, Aojie
    Du, Yuan
    Du, Li
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 43 (08) : 2379 - 2392
  • [9] A ReRAM-Based Computing-in-Memory Convolutional-Macro With Customized 2T2R Bit-Cell for AIoT Chip IP Applications
    Tan, Fei
    Wang, Yiming
    Yang, Yiming
    Li, Liran
    Wang, Tian
    Zhang, Feng
    Wang, Xinghua
    Gao, Jianfeng
    Liu, Yongpan
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2020, 67 (09) : 1534 - 1538
  • [10] An Energy-Efficient Mixed-Bit CNN Accelerator With Column Parallel Readout for ReRAM-Based In-Memory Computing
    Liu, Dingbang
    Zhou, Haoxiang
    Mao, Wei
    Liu, Jun
    Han, Yuliang
    Man, Changhai
    Wu, Qiuping
    Guo, Zhiru
    Huang, Mingqiang
    Luo, Shaobo
    Lv, Mingsong
    Chen, Quan
    Yu, Hao
    IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2022, 12 (04) : 821 - 834