Single-Input Dual-Output Digital Gate Driver IC Automatically Equalizing Drain Current Variations of Two Parallel-Connected SiC MOSFETs

被引:0
|
作者
Horii, Kohei [1 ,2 ]
Hata, Katsuhiro [1 ,3 ]
Hayashi, Shin-Ichiro [4 ,5 ]
Wada, Keiji [4 ]
Omura, Ichiro [6 ]
Takamiya, Makoto [1 ]
机构
[1] Univ Tokyo, Tokyo 1538505, Japan
[2] Toshiba Co Ltd, Kanagawa 2128582, Japan
[3] Shibaura Inst Technol, Tokyo 1358548, Japan
[4] Tokyo Metropolitan Univ, Tokyo 1910065, Japan
[5] Chiba Inst Technol, Chiba 2750016, Japan
[6] Kyushu Inst Technol, Fukuoka 8080196, Japan
关键词
Silicon carbide; MOSFET; Logic gates; Gate drivers; Circuits; Silicon; Costs; Drain current; gate driver; parallel; SiC mosfet;
D O I
10.1109/TPEL.2024.3462535
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A single-input, dual-output digital gate driver (DGD) IC is proposed, to solve the device characteristic variation problem and the parasitic inductance variation problem on PCBs in two parallel-connected SiC mosfets. This article is the first in the world to achieve all of 1) fully integrated two sensor output processing circuits, two DGDs and a controller required to detect and equalize the drain current variation of two parallel-connected SiC mosfets on a gate driver IC, 2) equalization of dc and surge components of drain current of each mosfet in a closed loop, and 3) demonstration measurements of drain current equalization under a total of four conditions, with and without SiC mosfet characteristic variations and with and without parasitic inductance variations.
引用
收藏
页码:467 / 485
页数:19
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