A Zero Common Mode Voltage SPWM Modulation Strategy for Parallel Inverters

In the electric propulsion system, the common mode voltage (CMV) is generated at the neutral end of the stator winding. With the development of hydrogen fuel electric aircraft, high-frequency CMV can induce leakage currents, while low-frequency CMV can meet electromagnetic compatibility standards and generate electromagnetic interference. Therefore, both pose a potential threat to system stability. Traditional inverters are powerless in eliminating CMV, while two parallel inverters can eliminate CMV theoretically. Therefore, this paper adopts parallel inverters as the driving topology. For parallel inverters, optimal modulation strategies have been widely adopted to suppress CMV, but most of the strategies have not considered the suppression of low-frequency CMV. In response to the above issues, this article proposes a zero common mode voltage SPWM (ZCMV-SPWM) to eliminate high-frequency CMV and low-frequency CMV. Firstly, four non-zero voltage vectors are used to synthesize the reference voltage of each inverter. Secondly, the restriction conditions of vector synthesis are added so that the same number of "1" and "0" have the same action time. Then, the two inverters use complementary switching sequences and compare the modulated signals with two carriers, where the phase difference between the two carriers is 180 degrees. Finally, the effectiveness of the method is verified by experiments.