共 50 条
- [1] LAYOUT SYSTEM FOR THE RANDOM LOGIC PORTION OF MOS LSI. Jahrbuch der Schiffbautechnischen Gesellschaft, 1980, : 92 - 99
- [3] LAYOUT - PARTITIONING METHOD FOR MSI AND LSI. Proceedings - IEEE International Symposium on Circuits and Systems, 1977, : 160 - 163
- [4] APPLICATION FOR SIT FOR LOGIC LSI. Japan Annual Reviews in Electronics, Computers & Telecommunications, 1982, 1 : 249 - 257
- [5] MOSSIM: A SWITCH-LEVEL SIMULATOR FOR MOS LSI. Proceedings - Design Automation Conference, 1981, : 786 - 790
- [7] CIRCUIT COMPARISON SYSTEM FOR BIPOLAR LINEAR LSI. NEC Research and Development, 1986, (80): : 86 - 96
- [8] HIGH PRESSURE OXIDATION OF SILICON AND ITS APPLICATION TO FABRICATION OF MOS LSI. Japan Annual Reviews in Electronics, Computers & Telecommunications, 1982, 1 : 82 - 99
- [9] MILD - A CELL-BASED LAYOUT SYSTEM FOR MOS-LSI. Proceedings - Design Automation Conference, 1981, : 828 - 836