CONSTRUCTIONS OF TERNARY FLIP-FLOP CIRCUITS.

被引:0
|
作者
Muranaka, Noriaki [1 ]
Imanishi, Shigeru [1 ]
机构
[1] Kansai Univ, Faculty of Engineering,, Suita, Jpn, Kansai Univ, Faculty of Engineering, Suita, Jpn
来源
Systems, computers, controls | 1984年 / 15卷 / 03期
关键词
ELECTRONIC CIRCUITS; FLIP FLOP - Design - INTEGRATED CIRCUITS - LOGIC DESIGN - MATHEMATICAL TECHNIQUES - Applications;
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摘要
Tri-value logic circuits consisting of 3-value fundamental flip-flop circuits employing CMOS IC's considered to be useful in integration are discussed. The authors propose construction methods for tri-value tri-stable flip-flops by using these tri-value fundamental circuits. 3-value RS-FF, 3-value RSS-FF, 3-value RSR-FF, 3-value D-FF, 3-Value T-FF, and 3-value JK-FF are defined as tri-value tri-stable FF's; thus their characteristic equations are found. Input equations are introduced by defining application equations. There are addition, substraction, and addition/subtraction types among tri-value T-FF and tri-value JK-FF whose outputs are fed back to their control gates. The normal operation cannot be ensured if these are not edge-triggered or of 2-stage structures. Therefore, concerning tri-value T-FF and tri-value JK-FF, 2-stage circuit constructions are relayed by use of partially fed back characteristic equations.
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页码:1 / 9
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