Parameterized hardware libraries for configurable system-on-chip technology

被引：0

作者：

Luk, Wayne ^{[1
]}

Kean, Tom ^{[1
]}

Derbyshire, Arran ^{[1
]}

Gause, Jörn ^{[1
]}

McKeever, Steve ^{[1
]}

Mencer, Oskar ^{[1
]}

Yeow, Allen ^{[1
]}

机构：

[1] Department of Computing, Imperial College, 180 Queens Gate, London SW7 2BZ, United Kingdom

来源：

Canadian Journal of Electrical and Computer Engineering | 2001年 / 26卷 / 3-4期

关键词：

Algorithms - Application specific integrated circuits - Computer hardware - Computer simulation - Cryptography - Field programmable gate arrays - High level languages - Microcontrollers - Polynomials;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

Two key components in configurable system-on-chip (CSoC) devices are instruction processors and field-programmable logic. This paper describes a framework, based on the Pebble language, that can be used to produce parameterized hardware libraries. Such libraries facilitate the development of user-defined hardware on the field-programmable logic to enhance the capability of the instruction processors in CSoC designs. Libraries are presented that support parameterization of the amount of pipelining and serialization to provide implementations with different trade-offs in resource usage and performance. These libraries have been developed to meet the requirements in terms of efficiency, validability, and ease of use. A case study involving DES encryption for Triscend E5 devices is presented.

引用

页码：125 / 129

共 50 条

[1] Parameterized hardware libraries for configurable system-on-chip technology
Luk, W
Kean, T
Derbyshire, A
Gause, J
McKeever, S
Mencer, O
Yeow, A
CANADIAN JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING-REVUE CANADIENNE DE GENIE ELECTRIQUE ET INFORMATIQUE, 2001, 26 (3-4): : 125 - 129
[2] Configurable and flexible System-on-Chip design
Hu, Hua
Wang, Luke
Xing, Jianguo
DCABES 2006 PROCEEDINGS, VOLS 1 AND 2, 2006, : 1214 - 1218
[3] Design of a configurable system-on-chip for audio application
Tan, Honghe
Sun, Yihe
ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 740 - 743
[4] A configurable system-on-chip architecture for embedded devices
Wallner, S
ADVANCES IN COMPUTER SYSTEMS ARCHITECTURE, PROCEEDINGS, 2004, 3189 : 58 - 71
[5] Configurable processors and the evolution of system-on-chip design
Maydan, DE
ERSA'05: PROCEEDINGS OF THE 2005 INTERNATIONAL CONFERENCE ON ENGINEERING OF RECONFIGURABLE SYSTEMS AND ALGORITHMS, 2005, : 37 - 37
[6] Field configurable system-on-chip device architecture
Knapp, S
Tavana, D
PROCEEDINGS OF THE IEEE 2000 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2000, : 155 - 158
[7] Extensible and configurable processors for system-on-chip design
Nurmi, Jari
Leibson, Steve
Campi, Fabio
Panis, Christian
ADVANCED SIGNAL PROCESSING, CIRCUITS, AND SYSTEM DESIGN TECHNIQUES FOR COMMUNICATIONS, 2006, : 45 - +
[8] Design methodology of a configurable system-on-chip architecture
Wallner, S
12TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS, 2004, : 283 - 284
[9] Architecture, memory and interface technology integration of an industrial/academic configurable system-on-chip (CSoC)
Becker, J
Vorbach, M
ISVLSI 2003: IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: NEW TRENDS AND TECHNOLOGIES FOR VLSI SYSTEMS DESIGN, 2003, : 107 - 112
[10] A configurable system-on-chip architecture with descriptors for dynamic reconfiguration
Wallner, S
ESA'04 & VLSI'04, PROCEEDINGS, 2004, : 157 - 163

← 1 2 3 4 5 →