COMPENSATED SYNCHRONOUS INTEGRATOR.

被引：0
|
作者：
Brailovskii, V.V.
Zhuk, O.P.
Tarko, L.O.
Shelyag, A.R.
机构：
来源：
Instruments and experimental techniques New York | 1982年 / 25卷 / 6 pt 1期
关键词：
SIGNAL PROCESSING;
D O I：
暂无
中图分类号：
TN7 [基本电子电路];
学科分类号：
080902 ;
摘要：
The synchronous integrator described is divided into two stages with an inverting amplifier between them, thus lowering the residual voltage of the fundamental harmonic of the carrier frequency of 300 dB. The dynamic range of the measured signals is 80 dB and the frequency range is 20 Hz-50 kHz.
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页码：1410 / 1411
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