A block-oriented RAM with half-sized DRAM cell and quasi-folded data-line architecture

被引:0
|
作者
机构
[1] Kimura, Katsutaka
[2] Sakata, Takeshi
[3] Itoh, Kiyoo
[4] Kaga, Toru
[5] Nishida, Takashi
[6] Kawamoto, Yoshifumi
来源
Kimura, Katsutaka | 1600年 / 26期
关键词
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
相关论文
共 1 条
  • [1] A BLOCK-ORIENTED RAM WITH HALF-SIZED DRAM CELL AND QUASI-FOLDED DATA-LINE ARCHITECTURE
    KIMURA, K
    SAKATA, T
    ITOH, K
    KAGA, T
    NISHIDA, T
    KAWAMOTO, Y
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (11) : 1511 - 1518