FPGA-based hardware implementation of generalized profile search using online arithmetic

被引：0
|
作者：
Mosanya, Emeka [1 ]
Sanchez, Eduardo [1 ]
机构：
[1] Swiss Federal Inst of Technology, Lausanne, Switzerland
来源：
ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA | 1999年
关键词：
Algorithms - Digital arithmetic - Logic design;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
This paper describes the hardware implementation of the Generalized Profile Search algorithm using online arithmetic and redundant data representation. This is part of the GenStorm project, aimed at providing a dedicated computer for biological sequence processing based on reconfigurable hardware using FPGAs. The serial evaluation of the result made possible by a redundant data representation leads to a significant increase of data throughput in comparison with standard non redundant data coding.
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页码：101 / 110
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