AGAs - Alterable Gate Arrays.

被引：0

作者：

Krug, Heinz

机构：

来源：

Elektronik Munchen | 1982年 / 31卷 / 23期

关键词：

Compendex;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

LOGIC DEVICES

引用

页码：73 / 74

共 50 条

[1] Gate Arrays.
Johansen, Eivind
Elektronikcentralen (Report) ECR, 1983, : 1 - 98
[2] HIERARCHICAL LOOSE ROUTING FOR GATE ARRAYS.
Winter, Klaus
Mlynski, Dieter A.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1986, CAD-6 (05):
[3] FUJITSU OFFERS VERSATILE RANGE OF GATE ARRAYS.
Honma, Akira
JEE, Journal of Electronic Engineering, 1983, 20 (197): : 50 - 52
[4] GATE OXIDE INTEGRITY OF NMOS TRANSISTOR ARRAYS.
Swartz, G.A.
IEEE Transactions on Electron Devices, 1986, ED-33 (11) : 1826 - 1829
[5] REVIEW OF BUILT-IN TEST METHODOLOGIES FOR GATE ARRAYS.
Totton, K.A.E.
IEE Proceedings I: Solid State and Electron Devices, 1985, 132 (2 pt 1): : 121 - 129
[6] CAD TOOLS SPEED RECASTING OF RANDOM LOGIC INTO GATE ARRAYS.
Kazmi, Saeed
Electronic Products (Garden City, New York), 1985, 28 (12): : 53 - 58
[7] MASTER2: A HIERARCHICAL LAYOUT SYSTEM FOR GATE ARRAYS.
Yabe, Shoji
Nomura, Minoru
Takano, Nobuo
Kawanishi, Hiroshi
Yoshizawa, Hitoshi
Kato, Haruo
Noda, Shigeo
NEC Research and Development, 1984, (74): : 24 - 30
[8] Application of Computer-aided-design (CAD) to Gate Arrays.
Schwarz, Joachim
1600, (32):
[9] HOW OKI ELECTRIC PRODUCES HIGH-PERFORMANCE GATE ARRAYS.
Shimizu, Takafumi
JEE, Journal of Electronic Engineering, 1983, 20 (197): : 44 - 48
[10] Microwell arrays.
Walt, DR
Michael, KL
Ferguson, JA
Schultz, SL
Taylor, LC
ABSTRACTS OF PAPERS OF THE AMERICAN CHEMICAL SOCIETY, 1997, 213 : 206 - ANYL