共 50 条
- [1] Automatic verification based on abstract interpretation FUNCTIONAL AND LOGIC PROGRAMMING, PROCEEDINGS, 1999, 1722 : 131 - 146
- [2] AUTOMATIC VERIFICATION OF ASYNCHRONOUS CIRCUITS USING TEMPORAL LOGIC IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES, 1986, 133 (05): : 276 - 282
- [4] Automatic verification by abstract interpretation - (Invited tutorial) VERIFICATION, MODEL CHECKING, AND ABSTRACT INTERPRETATION, 2003, 2575 : 20 - 24
- [5] Verification of asynchronous logic circuit design using process algebra Systems and Computers in Japan, 1997, 28 (08): : 33 - 43