共 50 条
- [6] ARCHITECTURE FOR SINGLE-CHIP ASIC PROCESSOR WITH INTEGRATED FLOATING POINT UNIT PROCEEDINGS OF THE TWENTY-FIRST, ANNUAL HAWAII INTERNATIONAL CONFERENCE ON SYSTEM SCIENCES, VOLS 1-4: ARCHITECTURE TRACK, SOFTWARE TRACK, DECISION SUPPORT AND KNOWLEDGE BASED SYSTEMS TRACK, APPLICATIONS TRACK, 1988, : 221 - 229
- [7] 24-BIT SINGLE-CHIP MULTIPLIER EASES FLOATING-POINT COMPUTATIONS EDN MAGAZINE-ELECTRICAL DESIGN NEWS, 1978, 23 (11): : 156 - 156
- [9] 40-MHZ SINGLE-CHIP DEVICE PROCESSES FLOATING-POINT INSTRUCTIONS FOR SPARC COMPUTER DESIGN, 1989, 28 (13): : 91 - 91
- [10] A HYBRID FLOATING-POINT LOGARITHMIC NUMBER SYSTEM PROCESSOR IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1985, 32 (01): : 92 - 95