Optimal Graph Constraint Reduction for Symbolic Layout Compaction

被引：0

作者：

Pan, Peichen

Dong, Sai-Keung

Liu, C.L.

机构：

[1] Dept. of Elec. and Comp. Engineering, Clarkson University, Potsdam, NY 13699, United States

[2] Silicon Graphics, Inc., Mountain View, CA 94039, United States

[3] Department of Computer Science, Univ. Illinois at Urbana-Champaign, Urbana, IL 61801, United States

来源：

Algorithmica (New York) | 1997年 / 18卷 / 04期

关键词：

D O I：

暂无

中图分类号：

学科分类号：

摘要：

引用

页码：560 / 574

共 50 条

[1] Optimal Graph Constraint Reduction for Symbolic Layout Compaction
Peichen Pan
Sai-keung Dong
C. L. Liu
Algorithmica, 1997, 18 : 560 - 574
[2] Optimal graph constraint reduction for symbolic layout compaction
Pan, P
Dong, SK
Liu, CL
ALGORITHMICA, 1997, 18 (04) : 560 - 574
[3] A HIERARCHICAL CONSTRAINT GRAPH GENERATION AND COMPACTION SYSTEM FOR SYMBOLIC LAYOUT
DELANGE, AAJ
DELANGE, JSJ
VINK, JF
PROCEEDINGS - IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN : VLSI IN COMPUTERS & PROCESSORS, 1989, : 532 - 535
[4] A HIERARCHICAL GRAPH ORIENTED COMPACTION SYSTEM FOR SYMBOLIC LAYOUT
DELANGE, JSJ
DELANGE, AAJ
1989 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3, 1989, : 57 - 60
[5] ON AN ALGORITHM TO DETECT POSITIVE CYCLES IN A CONSTRAINT GRAPH FOR LAYOUT COMPACTION
ISHIMA, K
TSUKIYAMA, S
IEICE TRANSACTIONS ON COMMUNICATIONS ELECTRONICS INFORMATION AND SYSTEMS, 1991, 74 (11): : 3613 - 3616
[6] OPTIMAL CONSTRAINT GRAPH GENERATION ALGORITHM FOR LAYOUT COMPACTION USING ENHANCED PLANE-SWEEP METHOD
AWASHIMA, T
SATO, M
OHTSUKI, T
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1993, E76A (04) : 507 - 512
[7] SYMBOLIC LAYOUT COMPACTION UNDER CONDITIONAL DESIGN RULES
CHENG, CK
DENG, XT
LIAO, YZ
YAO, SZ
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1992, 11 (04) : 475 - 486
[8] AUTOMATIC TUB REGION GENERATION FOR SYMBOLIC LAYOUT COMPACTION
LO, CY
26TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, 1989, : 302 - 306
[9] SLIP - SYMBOLIC LAYOUT OF INTEGRATED-CIRCUITS WITH COMPACTION
DUNLOP, AE
COMPUTER-AIDED DESIGN, 1978, 10 (06) : 387 - 391
[10] ALGORITHMS FOR OPTIMIZING, TWO-DIMENSIONAL SYMBOLIC LAYOUT COMPACTION
WOLF, WH
MATHEWS, RG
NEWKIRK, JA
DUTTON, RW
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1988, 7 (04) : 451 - 466

← 1 2 3 4 5 →