共 50 条
- [2] A SYSTOLIC REALIZATION FOR 2-D DIGITAL-FILTERS IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1989, 37 (04): : 560 - 565
- [3] VLSI MULTIPROCESSOR IMPLEMENTATION OF BLOCK STATE-SPACE 2-D DIGITAL-FILTERS 1989 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3, 1989, : 1103 - 1106
- [5] Modular systolic array implementation for separable denominator 2-D block state-space digital filters based on reduced-dimensional decomposition ELECTRONICS AND COMMUNICATIONS IN JAPAN PART III-FUNDAMENTAL ELECTRONIC SCIENCE, 2000, 83 (02): : 55 - 66
- [6] AN ITERATIVE IMPLEMENTATION FOR 2-D DIGITAL-FILTERS IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1980, 28 (06): : 666 - 671
- [7] IMPLEMENTATION OF 2-D DIGITAL-FILTERS BY ITERATIVE METHODS IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1982, 30 (03): : 473 - 487
- [8] A new VLSI architecture without global broadcast for 2-D digital filters ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL I: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY, 2000, : 547 - 550
- [9] Systolic architecture for transposition-free VLSI implementation of separable 2-D DWT 2006 10TH IEEE SINGAPORE INTERNATIONAL CONFERENCE ON COMMUNICATION SYSTEMS, VOLS 1 AND 2, 2006, : 171 - +
- [10] A NOTE ON THE 2-D NOISE MATRIX OF 2-D STATE-SPACE DIGITAL-FILTERS IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1988, 35 (05): : 610 - 611