EFFECTS OF SUBSTRATE RESISTANCE ON CMOS LATCHUP HOLDING VOLTAGES.

被引：0

作者：

Gupta, Rajesh K. ^{[1
]}

Sakai, Isami ^{[1
]}

Hu, Chenming ^{[1
]}

机构：

[1] Univ of California, Berkeley, CA,, USA, Univ of California, Berkeley, CA, USA

来源：

IEEE Transactions on Electron Devices | 1987年 / ED-34卷 / 11期

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[1] EFFECTS OF SUBSTRATE RESISTANCE ON CMOS LATCHUP HOLDING VOLTAGES
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