共 50 条
- [1] A framework for verification of SystemC designs using SystemC waiting state automata Advances in Intelligent Systems and Computing, 2014, 263 : 77 - 104
- [2] Power specification, simulation and verification of SystemC designs PROCEEDINGS OF 2016 IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS), 2016,
- [3] An approach for the verification of SystemC designs using AsmL AUTOMATED TECHNOLOGY FOR VERIFICATION AND ANALYSIS, PROCEEDINGS, 2005, 3707 : 69 - 83
- [4] Assertion based verification of PSL for SystemC designs 2004 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS, 2004, : 177 - 180
- [5] Formal verification of LTL formulas for systemc designs PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V: BIO-MEDICAL CIRCUITS & SYSTEMS, VLSI SYSTEMS & APPLICATIONS, NEURAL NETWORKS & SYSTEMS, 2003, : 245 - 248
- [6] Towards an efficient assertion based verification of SystemC designs NINTH IEEE INTERNATIONAL HIGH-LEVEL DESIGN VALIDATION AND TEST WORKSHOP, PROCEEDINGS, 2004, : 19 - 22
- [7] A Static Analysis Approach for Verification of Synchronization Correctness of SystemC Designs 16TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2013), 2013, : 89 - 96
- [8] Coverage Metrics for Verification of Concurrent SystemC Designs Using Mutation Testing 2010 IEEE INTERNATIONAL HIGH LEVEL DESIGN VALIDATION AND TEST WORKSHOP (HLDVT), 2010, : 75 - 81
- [9] A C/C++-based functional verification framework using the SystemC verification library 16TH INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS: SHORTENING THE PATH FROM SPECIFICATION TO PROTOTYPE, 2005, : 237 - 239
- [10] A Semantics-based Translation Method for Automated Verification of SystemC TLM Designs JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2013, 29 (05): : 685 - 695