An improved digital decimation filter for sigma-delta ADC

被引：0

作者：

Hao Z.-G. ^{[1
,2
]}

Yang H.-G. ^{[1
]}

Zhang C. ^{[1
,2
]}

Wu Q.-S. ^{[1
,2
]}

Yin T. ^{[1
]}

机构：

[1] Institute of Electronics, Chinese Academy of Sciences

[2] Graduate University, Chinese Academy of Sciences

来源：

Dianzi Yu Xinxi Xuebao/Journal of Electronics and Information Technology | 2010年 / 32卷 / 04期

关键词：

Differentiator; Filter; Sigma-delta ADC;

D O I：

10.3724/SP.J.1146.2009.00247

中图分类号：

学科分类号：

摘要：

Usually in a sigma-delta ADC, the digital filter takes most of the chip area. In this paper, a novel digital filer topology is proposed, in which the differentiator is constructed with a control unit and an adder instead of the multiple of adders in the Hogenauer structure filter, so that the digital circuit area should be reduced. A fourth order digital filter employing such topology is implemented in a Cyclone-II FPGA, and costs chip resources 29 percent less than in a Hogenauer structure.

引用

页码：1012 / 1016

页数：4

共 11 条

[1] Fujimori I., Koyama K., Trager D., Et al., A 5-V single-chip delta-sigma audio A/D converter with 111 dB dynamic range, IEEE Journal of Solid-State Circuits, 32, 3, pp. 329-336, (1997)
[2] Geerts Y., Marques M.A., Steyaert M.S., A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications, IEEE Journal of Solid-State Circuits, 34, 7, pp. 927-936, (1999)
[3] Dolecek G., Mitra S., On design of CIC decimation filter with improved response 2008, 3rd International Symposium on Communications, Control and Signal Processing, pp. 1072-1076, (2008)
[4] Chong K., Gopalakrishanan P., Et al., Low power approach for decimation filter hardware realization, Proceedings of World Academy of Science, Engineering and Technology, pp. 550-553, (2008)
[5] Shiraishi M., A simultaneous coefficient calculation method for sincN FIR filters, IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 50, 4, pp. 523-529, (2003)
[6] Quiquempoix V., Bellini G., Et al., Digital decimation filter, (2004)
[7] Hogenauero B., An economical class of digital filters for decimation and interpolation, IEEE Transactions on Acoustics, Speech, and Signal Processing, 29, 2, pp. 155-162, (1981)
[8] Chu S., Burrus C., Multirate filter designs using comb filters, IEEE Transactions on Circuit Systems, 32, 11, pp. 913-924, (1984)
[9] Losada R., Lyons R., Reducing CIC filter complexity, IEEE Signal Process Magazine, 23, 4, pp. 124-126, (2006)
[10] Laddomada M., Generalized comb decimation filters for ΣΔ A/D converters: analysis and design, IEEE Transactions on Circuits Systems I, 54, 5, pp. 994-1005, (2007)

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