Maximizing Ripple Cancellation in Input Current for SIDO Boost Converter by Design of Coupled Inductors

被引:14
|
作者
Nupur [1 ]
Nath, Shabari [1 ]
机构
[1] The Department of Electronics and Electrical Engineering, Indian Institute of Technology, Assam, Guwahati,781039, India
关键词
D O I
10.1109/JESTIE.2021.3078266
中图分类号
学科分类号
摘要
The requirement of multiple voltage levels in various applications has necessitated the development of single-input dual-output (SIDO) converters. This article focuses on a magnetically coupled-inductor SIDO (CI-SIDO) boost converter. In any converter, ripples in input current need to be reduced to decrease the requirements of input filters, to meet the strict restrictions on input current ripples, and several other benefits. In converters such as interleaved boost converters, maximum ripple cancellations are introduced to reduce the ripples in input current by shifting gate pulses. However, unlike an interleaved boost converter, the CI-SIDO boost converter has two unequal inductances and two different output voltages. In addition to the shifting of gate pulses, the maximum ripple cancellation in the CI-SIDO boost converter depends on the design of coupled inductors. This article analyzes the effect of coupled inductors on the maximum ripple cancellation and proposes a design for coupled inductors to achieve the maximum ripple cancellation. The proposed design method is explained and verified using practical examples. The findings of the analysis are verified experimentally by the laboratory prototype. © 2021 IEEE.
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页码:409 / 419
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