Hardware/Software Co-Design of a Feature-Based Satellite Pose Estimation System

被引:2
|
作者
Liu, Yunjie [1 ]
Bettens, Anne [1 ]
Wu, Xiaofeng [1 ]
机构
[1] Univ Sydney, Sch Aerosp Mech & Mechatron Engn, Sydney, NSW 2006, Australia
关键词
Feature detection; field-programmablegate array (FPGA); hardware/software; (HW/SW); co-design; pose estimation; random sample consensus (RANSAC); speeded up robust features (SURF);
D O I
10.1109/JMASS.2023.3328879
中图分类号
V [航空、航天];
学科分类号
08 ; 0825 ;
摘要
Vision-based pose estimation is fundamental for close proximity satellite operations, especially for on-orbit service missions. While neural network methods for pose estimation are becoming more widespread, traditional computer vision techniques still offer unique benefits in terms of efficiency and reliability. This article presents an algorithm that uses feature point detection and random sample consensus (RANSAC) as a solution for satellite pose estimation. The proposed algorithm requires no initialization, previous pose, or motion state information, which significantly reduces processing time. A comparison was conducted between the proposed algorithm and neural-network-based approaches. It was found that the proposed method only needs minimal training samples and memory to produce high-precision pose estimation, making it appropriate for use on small satellite platforms, such as CubeSats. Moreover, the satellite pose estimation implementation was achieved through hardware/software (HW/SW) co-design, by implementing the feature point detection module on a field-programmable gate array (FPGA). This approach takes full advantage of an FPGA's pipeline structure and the ability for parallel operation of software and hardware. Consequently, it offers an efficient solution for satellite pose estimation with improved operational efficiency, resource utilization, and low power consumption.
引用
收藏
页码:16 / 26
页数:11
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