Acceleration scheme of RXD algorithm based on FPGA for hyperspectral anomaly target detection

被引:0
|
作者
Zheng Y. [1 ]
Li Y. [1 ]
Shi Y. [1 ]
Qu J. [1 ]
Xie W. [1 ]
机构
[1] State Key Laboratory of Integrated Services Networks, Xidian University, Xi'an
来源
Li, Yunsong (ysli@mail.xidian.edu.cn) | 2018年 / Beijing University of Aeronautics and Astronautics (BUAA)卷 / 44期
基金
中国国家自然科学基金;
关键词
Acceleration scheme; Block parallel; High level synthesis (HLS); Hyperspectral anomaly target detection; QR decomposition; RXD algorithm;
D O I
10.13700/j.bh.1001-5965.2018.0344
中图分类号
学科分类号
摘要
Hyperspectral images bring abundant spectral information, but their large size and high dimensionality also lead to huge calculation. Therefore, it is particularly urgent to develop a high-speed processing scheme for anomaly target detection algorithms. Considering that the field programmable gate arrays (FPGA) are of powerful parallel capability and highly flexible design, aiming at the problem that the computation of the covariance matrix and its inverse is too large in the Reed-Xiaoli Detector (RXD) algorithm, we propose an acceleration scheme of block parallel and QR decomposition for the RXD algorithm based on the FPGA platform, which is optimized by high level synthesis (HLS). Experimental results show that the processing speed of FPGA-based acceleration scheme proposed in this paper is 7.04 times faster than that of CPU-based implementations with the detection performance preserved simultaneously, which verifies that the proposed acceleration scheme is correct and effective. © 2018, Editorial Board of JBUAA. All right reserved.
引用
收藏
页码:2556 / 2567
页数:11
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