A 600 mV +20 dBm IIP3 CMOS LNA with gm smoothening auxiliary path for 2.4 GHz wireless applications

被引:0
|
作者
Rao D.S.B. [1 ]
Sumalatha V. [1 ]
机构
[1] Electronics and Communication Engineering, Department, JNTUA, Andhra Pradesh, Anantapuramu
关键词
802.11; b/g/n; BSIMv3; cascode LNA; folded cascode LNA; LNA; low noise amplifier; MDS technique; wireless LAN; wireless personal area networks; wireless sensor networks; WPAN; WSN;
D O I
10.1504/IJICA.2022.124236
中图分类号
学科分类号
摘要
CMOS low noise amplifiers (LNA's) finds a large-scale of applications in biomedical applications and other mission sensors which include cordless telephones, wireless keyboards, and radio equipment. For radio-frequency (RF) applications where signal frequencies are high, consequences of intermodulation distortion results from the nonlinearities of the MOS transistors used in the LNA. As it is impracticable to eradicate nonlinearities completely, second-order nonlinearities were added in out of phase with the third-order nonlinearities in derivative and modified derivative methods which suppress the third-order nonlinearities up to an input intercept point (IIP3) of 8 dBm only. In this article, proposed LNA reduces the nonlinearity interaction increases the IIP3 performance up to 12 dBm using the common source differential architecture with PMOS loads in the auxiliary path. The proposed LNA offers gain (S21) of 12 dB operates at ultra-low voltage supply headroom of 600 mV with good stability deemed as a favourable requirement for low power wireless applications. © 2022 Inderscience Enterprises Ltd.
引用
收藏
页码:127 / 137
页数:10
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