共 50 条
- [1] Minimizing makespan on a single burn-in oven in semiconductor manufacturingEUROPEAN JOURNAL OF OPERATIONAL RESEARCH, 2000, 120 (03) : 559 - 574Sung, CSChoung, YI
- [2] Minimizing makespan on a single burn-in oven with job families and dynamic job arrivalsCOMPUTERS & OPERATIONS RESEARCH, 2002, 29 (08) : 995 - 1007Sung, CSChoung, YIHong, JMKim, YH
- [3] A joint GA+DP approach for single burn-in oven scheduling problems with makespan criterionThe International Journal of Advanced Manufacturing Technology, 2007, 35 : 587 - 595Fuh-Der Chou
- [4] A joint GA plus DP approach for single burn-in oven scheduling problems with makespan criterionINTERNATIONAL JOURNAL OF ADVANCED MANUFACTURING TECHNOLOGY, 2007, 35 (5-6): : 587 - 595Chou, Fuh-Der
- [5] Scheduling Algorithms for Minimizing Tardiness of Orders at the Burn-in Workstation in a Semiconductor Manufacturing SystemIEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2011, 24 (01) : 14 - 26Kim, Yeong-DaeKang, Jae-HunLee, Gyeong-EunLim, Seung-Kil
- [6] Minimizing earliness–tardiness on a single burn-in oven with a common due date and maximum allowable tardiness constraintOR Spectrum, 2006, 28 : 177 - 198Lars MönchRobert UnbehaunYou In Choung
- [7] MINIMIZING POWER-SUPPLY DISTURBANCES DURING SEMICONDUCTOR BURN-INEE-EVALUATION ENGINEERING, 1995, 34 (03): : 151 - 152MAIER, C
- [8] Minimizing earliness-tardiness on a single burn-in oven with a common due date and maximum allowable tardiness constraintOR SPECTRUM, 2006, 28 (02) : 177 - 198Mönch, LUnbehaun, RChoung, YI
- [9] Optimal burn-in for minimizing cost and multiobjectivesMICROELECTRONICS AND RELIABILITY, 1998, 38 (10): : 1577 - 1583Kim, KN
- [10] A PTAS for semiconductor burn-in schedulingJOURNAL OF COMBINATORIAL OPTIMIZATION, 2005, 9 (01) : 1 - 13Deng, XTFeng, HDLi, GJShi, BY
