Dead time compensation technology of single-phase diode-clamped three-level inverter

被引:0
|
作者
Luo D. [1 ]
Lin H. [1 ]
Shu Z. [1 ]
机构
[1] School of Electrical Engineering, Southwest Jiaotong University, Chengdu
基金
中国国家自然科学基金;
关键词
Bridge arm current; Dead time compensation; Electric inverters; Single-phase diode-clamped three-level inveter;
D O I
10.16081/j.issn.1006-6047.2018.08.021
中图分类号
学科分类号
摘要
Aiming at the deficiencies of output current and voltage distortions and harmonic content increase caused by dead time in the modulation process, a simple and feasible dead time compensation strategy is proposed. This strategy adds dead time compensation between the modulation signal and dead time processing of the traditional modulation method. Taking the single-phase diode-clamped three-level inverter as an example, the influence of dead time on the arm output level is analyzed, and the rising edge or falling edge is relayed based on the arm current direction, in order to reasonably compensate the dead time. Compared with the traditional dead time compensation techniques based on specific modulation mode, the proposed strategy is simple, independent to the modulation mode and can be flexibly applied to different modulation modes. The simulation model is established with MATLAB/Simulink, the control core of dead time compensation environment is designed based on programmable logic device, and the physical experiment platform is constructed. The simulative and experimental results verify the effectiveness of the proposed dead time compensation strategy. © 2018, Electric Power Automation Equipment Press. All right reserved.
引用
收藏
页码:147 / 151
页数:4
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