Design and implementation of high-speed scalar multiplier for multi-elliptic curve

被引：0
|
作者：
Yu B. [1 ]
Huang H. [1 ]
Liu Z. [1 ]
Zhao S. [1 ]
Na N. [1 ]
机构：
[1] School of Software and Microelectronics, Harbin University of Science and Technology, Harbin
来源：
Tongxin Xuebao/Journal on Communications | 2020年 / 41卷 / 12期
关键词：
ECC; Fast modular reduction; Hardware implementation; Scalar multiplication;
D O I：
10.11959/j.issn.1000-463X.2020226
中图分类号：
学科分类号：
摘要：
Aiming at the problem that the existing scalar multiplier cannot be applied to multi-elliptic curve and the cost is expensive, a high-speed scalar multiplier was designed, applicable to two types of elliptic curves over prime fields. Firstly, in terms of the scalar multiplication, secp256r1 base points were processed with the comb algorithm, and the Shamir algorithm for ordinary points, and the Montgomery ladder algorithm for Curve25519. Secondly, the operation of point addition and point doubling was optimized, and the condition of Z=1 in point addition was simplified, thereby effectively reducing the number of calculation cycles. Lastly, a fast modular reduction algorithm of Curve25519 was designed for modular multiplication. Multiplexing was an important factor in the entire designing process. A 1022K equivalent gate was selected for the 55 nm CMOS process. This allowed ordinary point scalar multiplications performed on secp256r1 and Curve25519 respectively, calculating at the speeds of 153 000 times per second and 158 000 times per second, with the speed for secp256r1 1.9 times that of the existing designed one. © 2020, Editorial Board of Journal on Communications. All right reserved.
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页码：100 / 109
页数：9
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