FPGA-based soft error sensitivity analysis method for microprocessor

被引：1

作者：

Liang H. ^{[1
]}

Sun H. ^{[1
]}

Sun J. ^{[1
]}

Huang Z. ^{[1
]}

Xu X. ^{[1
]}

Yi M. ^{[1
]}

Ouyang Y. ^{[2
]}

Lu Y. ^{[1
]}

Yan A. ^{[2
]}

机构：

[1] School of Electronic Science & Applied Physics, Hefei University of Technology, Hefei

[2] School of Computer & Information, Hefei University of Technology, Hefei

来源：

Dianzi Yu Xinxi Xuebao/Journal of Electronics and Information Technology | 2017年 / 39卷 / 01期

基金：

中国国家自然科学基金;

关键词：

Fault injection; FPGA; Sensitivity analysis; Single event upset; Soft error;

D O I：

10.11999/JEIT160225

中图分类号：

学科分类号：

摘要：

In order to quickly and automatically analyze the soft error sensitivity for microprocessors, a soft error sensitivity analysis method using FPGA-based fault injection is proposed. The fault and fault-free microprocessors on a FPGA are board run simultaneously. Moreover, a fault injection controller, a fault classification module and a fault list module are also implemented on the hardware. The method inherits the parallelism of the FPGA and achieves a fast and automatical fault injection for all storage bits. Further, using a PIC16F54 microprocessor as experimental subject, approximate 300, 000 soft errors are injected into the microprocessors to analyze its soft error sensitivity. In order to demonstrate the sensitivity evaluation efficiency of the method, the quite sensitive storage cells are hardened and the sensitivity is analyzed again. Compared to the simulation approach, experimental results show that the proposed technique achieves four orders of magnitude speedup. © 2017, Science Press. All right reserved.

引用

页码：245 / 249

页数：4

共 15 条

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