Compiler Technologies in Deep Learning Co-Design: A Survey

被引:1
|
作者
Zhang, Hongbin [1 ,2 ]
Xing, Mingjie [1 ]
Wu, Yanjun [1 ,3 ]
Zhao, Chen [1 ,3 ]
机构
[1] Institute of Software, Chinese Academy of Sciences, Beijing, China
[2] University of Chinese Academy of Sciences, Beijing, China
[3] State Key Lab of Computer Science, Beijing, China
来源
Intelligent Computing | 2023年 / 2卷
关键词
Co-designs - Compilation technology - Compiler design - Compiler technology - Cross layer optimization - Design ideas - Domain specific design - General purpose processors - Hardware and software - Learning fields;
D O I
10.34133/icomputing.0040
中图分类号
学科分类号
摘要
With the rapid development of deep learning applications, general-purpose processors no longer suffice for deep learning workloads because of the dying of Moore’s Law. Thus, computer architecture innovation has entered a golden age for domain-specific design, which has led to a demand for new compilation technologies to facilitate cross-layer optimization. Historically, hardware and software have been collaboratively designed. Today, these co-design ideas still benefit the deep learning field in both academia and industry, encompassing additional aspects and layers. In this study, we elaborate on past and recent works on deep learning compilers and co-design while focusing on the combination of these two technologies, which we believe is the trend in the new deep learning era. After summarizing the existing compilation technologies and co-design approaches, we propose a domain-specific compilation framework, the Buddy Compiler, for a typical deep learning co-design system. © 2023 Hongbin Zhang et al.
引用
收藏
相关论文
共 50 条
  • [1] The Deep Learning Compiler: A Comprehensive Survey
    Li, Mingzhen
    Liu, Yi
    Liu, Xiaoyan
    Sun, Qingxiao
    You, Xin
    Yang, Hailong
    Luan, Zhongzhi
    Gan, Lin
    Yang, Guangwen
    Qian, Depei
    IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2021, 32 (03) : 708 - 727
  • [2] Co-design Center for Exascale Machine Learning Technologies (ExaLearn)
    Alexander, Francis J.
    Ang, James
    Bilbrey, Jenna A.
    Balewski, Jan
    Casey, Tiernan
    Chard, Ryan
    Choi, Jong
    Choudhury, Sutanay
    Debusschere, Bert
    DeGennaro, Anthony M.
    Dryden, Nikoli
    Ellis, J. Austin
    Foster, Ian
    Cardona, Cristina Garcia
    Ghosh, Sayan
    Harrington, Peter
    Huang, Yunzhi
    Jha, Shantenu
    Johnston, Travis
    Kagawa, Ai
    Kannan, Ramakrishnan
    Kumar, Neeraj
    Liu, Zhengchun
    Maruyama, Naoya
    Matsuoka, Satoshi
    McCarthy, Erin
    Mohd-Yusof, Jamaludin
    Nugent, Peter
    Oyama, Yosuke
    Proffen, Thomas
    Pugmire, David
    Rajamanickam, Sivasankaran
    Ramakrishniah, Vinay
    Schram, Malachi
    Seal, Sudip K.
    Sivaraman, Ganesh
    Sweeney, Christine
    Tan, Li
    Thakur, Rajeev
    Van Essen, Brian
    Ward, Logan
    Welch, Paul
    Wolf, Michael
    Xantheas, Sotiris S.
    Yager, Kevin G.
    Yoo, Shinjae
    Yoon, Byung-Jun
    INTERNATIONAL JOURNAL OF HIGH PERFORMANCE COMPUTING APPLICATIONS, 2021, 35 (06): : 598 - 616
  • [3] DSP processor/compiler co-design: A quantitative approach
    Zivojnovic, V
    Pees, S
    Schlager, C
    9TH INTERNATIONAL SYMPOSIUM ON SYSTEMS SYNTHESIS, PROCEEDINGS, 1996, : 108 - 113
  • [4] HW/SW Co-Design and Co-Optimizations for Deep Learning
    Marchisio, Alberto
    Putra, Rachmad Vidya Wicaksana
    Hanif, Muhammad Abdullah
    Shafique, Muhammad
    WORKSHOP PROCEEDINGS 2018: INTELLIGENT EMBEDDED SYSTEMS ARCHITECTURES AND APPLICATIONS (INTESA), 2018, : 13 - 18
  • [5] A Hardware/Software Co-Design Vision for Deep Learning at the Edge
    Ponzina, Flavio
    Machetti, Simone
    Rios, Marco
    Denkinger, Benoit Walter
    Levisse, Alexandre
    Ansaloni, Giovanni
    Peon-Quiros, Miguel
    Atienza, David
    IEEE MICRO, 2022, 42 (06) : 48 - 54
  • [6] SiloD: A Co-design of Caching and Scheduling for Deep Learning Clusters
    Zhao, Hanyu
    Han, Zhenhua
    Yang, Zhi
    Zhang, Quanlu
    Li, Mingxia
    Yang, Fan
    Zhang, Qianxi
    Li, Binyang
    Yang, Yuqing
    Qiu, Lili
    Zhang, Lintao
    Zhou, Lidong
    PROCEEDINGS OF THE EIGHTEENTH EUROPEAN CONFERENCE ON COMPUTER SYSTEMS, EUROSYS 2023, 2023, : 883 - 898
  • [7] Co-Design of Cognitive Telerehabilitation Technologies
    How, Tuck-Voon
    PROCEEDINGS OF THE 16TH ACM INTERNATIONAL CONFERENCE ON HUMAN-COMPUTER INTERACTION WITH MOBILE DEVICES AND SERVICES (MOBILEHCI'14), 2014, : 407 - 408
  • [8] Compiler/hardware co-design for instruction boosting in ILP processors
    Wang, L
    Yang, TC
    IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 1999, 146 (06): : 269 - 274
  • [9] Compiler/hardware co-design for instruction boosting in ILP processors
    Feng Chia Univ, Taichung, Taiwan
    IEE Proc Comput Digital Tech, 6 (269-274):
  • [10] Hardware-Software Co-design Approach for Deep Learning Inference
    Paul, Debdeep
    Singh, Jawar
    Mathew, Jimson
    2019 7TH INTERNATIONAL CONFERENCE ON SMART COMPUTING & COMMUNICATIONS (ICSCC), 2019, : 118 - 122