Single-Phase Phase-Locked Loop for DC Offset and Harmonic Interference

被引：0
|
作者：
Zeng J. [1 ]
Cen D. [1 ]
Chen R. [1 ]
Liu J. [2 ]
机构：
[1] School of Electric Power, South China University of Technology, Guangzhou
[2] School of Automation Science and Engineering, South China University of Technology, Guangzhou
来源：
Liu, Junfeng (aujfliu@scut.edu.cn) | 1600年 / China Machine Press卷 / 36期
关键词：
DC offset; Harmonic interference; Phase-locked loop; Second-order generalized integrator;
D O I：
10.19595/j.cnki.1000-6753.tces.200595
中图分类号：
学科分类号：
摘要：
Aiming at the common problems of DC offset and harmonic interference in power grids, an improved phase-locked loop algorithm based on second-order generalized integrator phase-locked loop (SOGI-PLL) is proposed. In order to suppress the DC offset and simplify the parameter design, an integral branch is added to the pre-stage second-order generalized integrator (SOGI), and the SOGI is changed to a fixed frequency structure. A moving average filter is introduced into the post-stage loop of phase-locked loop (PLL) to enhance filtering performance. For the purpose of speeding up dynamic response, the integral part of PI controller is removed. Bode diagram analysis and small signal model derivation are used to improve structure design and determine the corresponding parameters. The proposed improved single-phase phase-locked loop technology can effectively eliminate DC offset and high-frequency harmonics, while having good dynamic performance and stability. Finally, Matlab/Simulink simulation and related experiments verify the proposed method. © 2021, Electrical Technology Press Co. Ltd. All right reserved.
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页码：3504 / 3515
页数：11
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