Influence and Optimization of Common Branch Impedance Coupling on Current Sharing of Paralleled SiC MOSFETs

被引:0
|
作者
Zhao B. [1 ]
Ke J. [2 ]
Sun P. [1 ]
Cai Y. [1 ]
Zhao Z. [1 ]
机构
[1] State Key Laboratory of Alternate Electrical Power System With Renewable Energy Sources, North China Electric Power University, Changping District, Beijing
[2] Shanghai Belling Co., Ltd., Xuhui District, Shanghai
关键词
Branch impedance compensation; Common branch impedance coupling; Current distribution; Silicon carbide MOSFET;
D O I
10.13334/j.0258-8013.pcsee.210272
中图分类号
学科分类号
摘要
To evaluate the influence of common branch impedance coupling on the dynamic and static current distribution of parallel silicon carbide MOSFET devices, and to improve the current sharing among parallel devices, an equivalent circuit model with critical parasitic resistance and parasitic inductance was established firstly, and the influence of common branch impedance coupling on the dynamic and static current distribution of parallel devices was analyzed. Then, aiming at the problem of different number of parallel devices in different application conditions, the method of impedance compensation for the parallel branches of n devices was proposed. By compensating the drain and source side impedance of the parallel devices, the influence of the common branch impedance coupling effect on the dynamic and static current distribution of the parallel device could be eliminated. Finally, the simulation circuit and experimental platform before and after the branch impedance compensation were built. Results show that by compensating the branch impedance of parallel devices, the sharing of dynamic and static current of parallel devices can be improved, which verifies the effectiveness of the method. © 2022 Chin. Soc. for Elec. Eng.
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页码:2638 / 2649
页数:11
相关论文
共 23 条
  • [1] SHENG Kuang, GUO Qing, ZHANG Junming, Et al., Development and prospect of SiC power devices in power grid, Proceedings of the CSEE, 32, 30, pp. 1-7, (2012)
  • [2] LI Zongjian, WANG Jun, YU Jiajun, Et al., Application of SiC JMOS and SiC DMOS in Si/SiC hybrid switch based single-phase inverter, Proceedings of the CSEE, 39, 19, pp. 5674-5682, (2019)
  • [3] SHENG Kuang, REN Na, XU Hongyi, A recent review on silicon carbide power devices technologies, Proceedings of the CSEE, 40, 6, pp. 1741-1752, (2020)
  • [4] WANG Lina, DENG Jie, YANG Junyi, Et al., Junction temperature extraction methods for Si and SiC power devices: a review and possible alternatives, Transactions of China Electrotechnical Society, 34, 7, pp. 703-716, (2019)
  • [5] ZHANG Qinghao, ZHANG Pinjia, A novel on-line method for monitoring the junction temperature of SiC MOSFET based on threshold voltage, Proceedings of the CSEE, 40, 18, pp. 5742-5750, (2020)
  • [6] CHEN Jie, DENG Erping, ZHAO Zixuan, Et al., Failure mechanism analysis of SiC MOSFET under different aging test methods, Transactions of China Electrotechnical Society, 35, 24, pp. 5105-5114, (2020)
  • [7] ZENG Zheng, ZHANG Xin, LI Xiaoling, Layout- dominated dynamic current imbalance in multichip power module: mechanism modeling and comparative evaluation, IEEE Transactions on Power Electronics, 34, 11, pp. 11199-11214, (2019)
  • [8] LIU Ping, LI Haipeng, MIAO Yiru, Et al., Low overshoot and low loss active gate driver for SiC MOSFET based on driving current dynamic regulation, Proceedings of the CSEE, 40, 18, pp. 5730-5741, (2020)
  • [9] WU Tao, SUN Peng, ZHAO Zhibin, Et al., A review of junction temperature measurement methods of SiC MOSFET by temperature-sensitive electrical parameters, Proceedings of the CSEE, 41, 11, pp. 3904-3914, (2021)
  • [10] SUN Peng, ZHAO Zhibin, CAI Yumeng, Et al., Chip screening for parallel silicon carbide MOSFET based on switching energy balancing, Proceedings of the CSEE, 39, 19, pp. 5613-5623, (2019)