A Characterization Method for Standard Cell Library at Near-Threshold Voltage

被引:0
|
作者
Hu W. [1 ]
An W. [1 ]
Yuan J. [2 ]
机构
[1] College of Physics and Microelectronics Science, Hunan University, Changsha
[2] Institute of Microelectronics, Chinese Academy of Sciences, Beijing
基金
中国国家自然科学基金;
关键词
Liberty file; Look-up table; Near-threshold; Standard cell library;
D O I
10.16339/j.cnki.hdxbzkb.2019.04.012
中图分类号
学科分类号
摘要
According to the actual application of a standard library cell operating in the near-threshold voltage region, and due to the problem of large error in the lookup table of traditional library files, this paper proposed a method to characterize the standard cell in near-threshold voltage region. The method redefined the boundary of the lookup table by analyzing the actual application of standard cell in near-threshold voltage, and by analyzing the relative error between the circuit synthesis result and circuit simulation result, it re-determined the scale of the lookup table, in order to improve the accuracy of standard cell library in near-threshold voltage region. This method was then used to characterize the smic55nm CMOS process library file in 0.6 V voltage and evaluate the relative error, and the results show that when compared to the library file established by traditional characterize method, the proposed method improved the library file's accuracy by 16%~63.51%, reduced the error of lookup table, and effectively improved the accuracy of library file. © 2019, Editorial Department of Journal of Hunan University. All right reserved.
引用
收藏
页码:85 / 90
页数:5
相关论文
共 8 条
  • [1] Wang A., Calhoum B.H., Chandrakasam A.P., Sub-threshold Design for Ultra Low-power Systems, pp. 1-3, (2006)
  • [2] Siliconsmart User's Guide: Version 2013.06
  • [3] Jun J., Song J., Kim C., A near-threshold voltage oriented digital cell library for high-energy efficiency and optimized performance in 65nm CMOS process, IEEE Transactions on Circuits and Systems I, 65, 5, pp. 1567-1580, (2017)
  • [4] Wey I.C., Lin P.J., Wu B.C., Et al., Near-threshold-voltage circuit design: The design challenges and chances, International SoC Design Conference (ISOCC), pp. 138-141, (2014)
  • [5] Yuan J., Zhang S.M., Shang X.C., Et al., An ultra voltage technique based on foundary standard cell libray, Microelectronics & Computer, 31, 12, pp. 6-9, (2014)
  • [6] Jiang J.H., Liang M., Wang L., Et al., An effective timing characterization method for an accuracy-proved VLSI standard cell library, Journal of Semiconductors, 35, 2, pp. 025005-1-025005-5, (2014)
  • [7] Library Compiler User's Guide: Version 2016.12
  • [8] Charafeddine K., Ouardi F., Fast timing characterization of cells in standard cell library design based on curve fitting, 2017 International Conference on Wireless Technologies, Embedded and Intelligent Systems (WITS), pp. 1-6, (2017)