A New Modeling Method for the Electromagnetic Emission of Integrated Circuits

A new method for estimating the parasitic emission of integrated circuits (ICs) is the main objective of this paper. In this study, experimental circuits were formulated, and printed circuit boards were fabricated to evaluate the input impedance at the power supply terminal of the designated microcontroller. Following the measurement of S-parameters for the experimental setup across a frequency spectrum ranging from 10 MHz to 2 GHz, Z-parameters were derived from the acquired S-parameter data. Then, all the unwanted impedance effects on the conducted line have been deleted mathematically with the de-embedding technique. The passive Resistor Inductor Capacitor (RLC) circuit was extracted using both analytic and modified genetic algorithms. Subsequently, the internal current values of the power supply pins were determined. Afterwards the passive RLC circuit and internal current values were obtained; the magnetic field in the internal structure of the IC was modeled as uniformly distributed conductive lines. The locations of the uniformly distributed conductive lines on the IC are defined as a straight route from the ends of the power supply pin to the IC core according to measurement results. A series of electromagnetic near-field measurements were conducted at varying frequencies in order to investigate the currents that traverse the power supply pins. The simulation of the magnetic field is conducted across the circuit under examination at varying frequencies and altitudes. The model results were compared to the measurement results obtained using the near-field test bench, which demonstrated a high degree of correlation.