A 2.4-GHz Multiphase Inductorless PLL With Coupled-Ring Oscillators and Time-Amplifying Phase-Frequency Detector for Low Phase Noise and Robust Locking Performances

This letter presents an inductorless compact 12-phase integer-N phase-locked-loop (PLL) with time-amplifying phase-frequency detector (TAPFD) to achieve low in-band phase noise. A time amplifier with automatic gain control is proposed to provide a wide detectable range during acquisition and a high gain at lock condition. The charge-pump gain is also adaptively tuned to ensure that the overall loop gain is constant for robust operation. The PLL includes a 12-phase inverter-based coupled ring oscillator. Instead of placing all the delay cells in one ring, the multiple phase outputs are achieved by capacitive coupling of two identical ring oscillators. The proposed double-ring coupled ring oscillator provides additional output phases without scarifying the output frequency and phase noise. The inductorless PLL is implemented in 22-nm FDX CMOS technology with a core area of 0.0253 mm(2) and achieves up to 23-dB in-band phase noise improvement to - 113.1 dBc/Hz and a measured integrated jitter of 1.274 ps at 2.4 GHz. The 12-phase ring PLL consumes 8.18 mW from a 0.8-V power supply and achieves a measured PLL FoM of 229 dB.