Mitigating Dead-Time Impact in a Three-Phase Split-Source Inverter: A Simple Compensation Method

The use of a split-source inverter (SSI) has gained popularity due to its ability to achieve boost operation without requiring additional active semiconductor switches. This results in lower costs, reduced complexity, and a smaller overall size compared to two-stage inverter topologies. The SSI is particularly well-suited for low-voltage-fed applications and offers advantages over other single-stage topologies, such as the utilization of conventional pulse-width modulation (PWM) switching, lower passive component count, continuous input current, and constant voltage across the bridge. All PWM methods used for the SSI introduce dead time to prevent shoot-through in the inverter bridge, but it also results in lower voltage boost and higher harmonic distortion in the output currents. This study investigates the negative effects of dead time on the SSI's performance and proposes a simple compensation method to mitigate these effects. It includes an analysis of four PWM methods - two biased and two unbiased. The effectiveness of the proposed compensation method is confirmed by experimental results.