Small-Signal and Large-Signal RF Characterization and Modeling of Low and High Voltage FinFETs for 14/16 nm Technology Node SoCs

被引:0
|
作者
Kar, Anirban [1 ]
Parihar, Shivendra Singh [1 ]
Huang, Jun Z. [2 ]
Zhang, Huilong [2 ]
Wang, Weike [2 ]
Imura, Kimihiko [2 ]
Chauhan, Yogesh Singh [1 ]
机构
[1] Indian Inst Technol Kanpur, Dept Elect Engn, NanoLab, Kanpur, India
[2] MaxLinear Inc, Carlsbad, CA USA
关键词
FinFETs; Radio frequency; Load modeling; Performance evaluation; Logic gates; Voltage measurement; Symbols; FinFET; RF; LDMOS; SoC; large-signal; compact model; BSIM-CMG; high-voltage; INCLUDING QUASI-SATURATION; PART I; MOSFETS; DEVICE;
D O I
10.1109/JEDS.2024.3384008
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Modern System-on-Chip (SoC) architectures necessitate low-voltage (LV) core transistors featuring excellent digital, analog, and radio frequency (RF) properties, as well as thick oxide transistors serving as robust I/O buffers and high-voltage (HV) transistors essential for efficient power management. This study presents a comprehensive DC to RF characterization, a detailed modeling strategy, and subsequent model parameter extraction for commercially produced LV and HV Fin Field Effect Transistors (FinFETs) at 14/16 nm technology. The industry-standard BSIM-CMG compact model is modified to accurately capture the characteristics of the HV FinFET devices integrated with the digital LV FinFETs for SoC applications. A detailed analysis of the DC, analog, and RF performance of LV, I/O, and HV FinFETs compared to the contemporary planar CMOS technology is performed. The large-signal performance of the device is evaluated using the developed model and validated with the measured data. Finally, a concise overview of the performance indicators associated with the modeled device is also presented.
引用
收藏
页码:415 / 425
页数:11
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