共 3 条
- [2] On Gate Stack Scalability of Double-Gate Negative-Capacitance FET with Ferroelectric HfO2 for Energy-Efficient Sub-0.2V Operation 2016 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW), 2016, : 176 - 177
- [3] Device Design Guideline for Steep Slope Ferroelectric FET Using Negative Capacitance in Sub-0.2V Operation: Operation Speed, Material Requirement and Energy Efficiency 2015 SYMPOSIUM ON VLSI TECHNOLOGY (VLSI TECHNOLOGY), 2015,