Impact of Lightly Doped Drain on Hot Carrier Degradation Variability in N-FETs and SRAM Cells

In this work, a comprehensive study of the influence of hot carrier degradation (HCD) variability on N-FETs and static random-access memory (SRAM) cells in different lightly doped drain (LDD) implantations is performed. It is shown that the stress-induced traps increase the VT fluctuation and that the inconsistent current degradation rate contributes to suppressing ID fluctuation. Higher LDD implantation dose results in lower HCD variability in transistors and SRAM cells, which is attributed to the alleviation of the cluster effect. The mechanisms are explained by the boron concentration distribution from source to drain end, which is demonstrated from the calibrated TCAD simulation. These results benefit transistors and circuits against HCD variability by optimization of the LDD process in mass production.