Design Techniques for Energy-Efficient Analog-to-Digital Converters

被引:4
|
作者
Jang, Moonhyung [1 ]
Tang, Xiyuan [2 ,3 ]
Lim, Yong [4 ]
Kauffman, John G. [5 ]
Sun, Nan [6 ]
Ortmanns, Maurits [5 ]
Chae, Youngcheol [7 ]
机构
[1] Stanford Univ, Dept Elect Engn, Stanford, CA 94306 USA
[2] Peking Univ, Inst Artificial Intelligence, Beijing 100871, Peoples R China
[3] Peking Univ, Sch Integrated Circuits, Beijing 100871, Peoples R China
[4] Samsung Elect, Syst LSI Div, Hwaseong 18448, South Korea
[5] Univ Ulm, Inst Microelect, D-89081 Ulm, Germany
[6] Tsinghua Univ, Dept Elect Engn, Beijing 100084, Peoples R China
[7] Yonsei Univ, Dept Elect & Elect Engn, Seoul 03722, South Korea
关键词
Analog-to-digital converter (ADC); continuous-time (CT); delta-sigma modulation; energy efficient; low power; noise-shaping (NS); pipelining; successive approximation; DELTA-SIGMA MODULATOR; PIPELINED-SAR ADC; DB SNDR; LOW-POWER; MU-W; MHZ BANDWIDTH; NEGATIVE-R; 65-NM CMOS; AMPLIFIER; COMPARATOR;
D O I
10.1109/OJSSCS.2023.3311418
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The energy efficiency of analog-to-digital converters (ADCs) has improved steadily over the past 40 years, with the best reported ADC efficiency improving by nearly six orders of magnitude over the same period. The best figure-of-merit (FoM) is achieved with a limited class of ADC in terms of resolution and speed, but the coverage of the best FoM ADC has been expended. Many ADCs with the record FoM open up new applications and often incorporate multiple combinations of architectural and circuit innovations. It would be very interesting to follow a path of relentless optimization that could be useful to further expand the operating bandwidth of energy-efficient ADCs. To help along this path, this review article discusses the design techniques that focus on optimizing energy efficiency, involving successive approximation, pipelining, noise-shaping, and continuous-time operation.
引用
收藏
页码:145 / 161
页数:17
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