VHDL AND SYNTHESIS TOOLS PROVIDE A GENERIC DESIGN ENTRY PLATFORM INTO FPGAS, PLDS AND ASICS

Field programmable gate arrays, programmable logic devices and application specific devices such as masked programmable gate arrays have now reached such a degree of complexity that it is impossible for a designer to effect a design in silicon without the support of computer aided design tools. Much of the software available is target device specific, in other words the designer must use tools that are specifically tailored toward the architecture and technology into which the design will finally be realized. The development of VHDL as a general design entry tool was sponsored by the US Department of Defence (DoD) to overcome the problem of a design becoming target dependent. In this way a design may be created in VHDL and the target technology chosen after the fact. The design may then be synthesized into a target technology by the application of synthesis tools. However, if that technology became obsolescent or impossible to procure a new target technology may be chosen and the synthesis tool re-applied to migrate the same design into the new device, thus forgoing the task of a complete logic redesign. This paper was written by Chris Jay as a consultant to Exemplar Logic, a California based supplier of synthesis tools to FPGA, PLD and ASIC manufacturers. The design example of a FIFO SRAM controller was completed and synthesized into a Xilinx FPGA device. Resulting simulation in the target technology confirmed functionality of the specific application.