SIMULATION OF A MACRO-PIPELINED MULTI-CPU EVENT PROCESSOR FOR USE IN FASTBUS

被引：0
|
作者：
LETHEREN, MF [1 ]
MARCHIORO, A [1 ]
SLORACH, F [1 ]
机构：
[1] RUTHERFORD APPLETON LAB,DIDCOT OX11 0QX,OXON,ENGLAND
来源：
IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1989年 / 36卷 / 05期
关键词：
D O I：
10.1109/23.41111
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
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页码：1597 / 1601
页数：5
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