SOME INTERESTING SIMULATION RESULTS OF VITERBI DECODER

被引:0
|
作者
TAQVI, SZH
机构
关键词
D O I
暂无
中图分类号
V [航空、航天];
学科分类号
08 ; 0825 ;
摘要
引用
收藏
页码:569 / &
相关论文
共 50 条
  • [1] IMPORTANCE SAMPLING AND VITERBI DECODER SIMULATION
    SADOWSKY, JS
    BUCKLEW, JA
    PROCEEDINGS OF THE 22ND CONFERENCE ON INFORMATION SCIENCES AND SYSTEMS, VOLS 1 & 2, 1988, : 319 - 324
  • [2] Simulation and visualization of the Viterbi decoder using a spreadsheet
    Rha, PS
    IEEE TRANSACTIONS ON EDUCATION, 2003, 46 (03) : 379 - 386
  • [3] A NEW METHOD FOR VITERBI DECODER SIMULATION USING IMPORTANCE SAMPLING
    SADOWSKY, JS
    IEEE TRANSACTIONS ON COMMUNICATIONS, 1990, 38 (09) : 1341 - 1351
  • [4] Memoryless Viterbi decoder
    El-Dib, DA
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2005, 52 (12) : 826 - 830
  • [5] Accelerating Viterbi decoder simulations
    Hardin, Tom
    Gardner, Steve
    Electronic Engineering (London), 1999, 71 (866): : 69 - 76
  • [6] Accelerating viterbi decoder simulations
    Hardin, T
    Gardner, S
    ELECTRONIC ENGINEERING, 1999, 71 (866): : 69 - +
  • [7] CMOS implementation of Viterbi decoder
    Sutagundar, Manjula
    Kambalimath, S. G.
    Sutagundar, A. V.
    PROCEEDINGS OF THE 6TH WSEAS INTERNATIONAL CONFERENCE ON SYSTEM SCIENCE AND SIMULATION IN ENGINEERING (ICOSSSE '07): SYSTEM SCIENCE AND SIMULATION IN ENGINEERING, 2007, : 280 - +
  • [8] NODE SYNCHRONIZATION FOR THE VITERBI DECODER
    LORDEN, G
    MCELIECE, RJ
    SWANSON, L
    IEEE TRANSACTIONS ON COMMUNICATIONS, 1984, 32 (05) : 524 - 531
  • [9] Array processors for Viterbi decoder
    Devaraj, SA
    Avessta, N
    2nd International Symposium on Wireless Communications Systems 2005 (ISWCS 2005), 2005, : 447 - 451
  • [10] Implementation scheme for a Viterbi decoder
    Arab Acad for Science, Alexandria, Egypt
    Nat Radio Sci Conf NRSC Proc, (C22):