EXPLOITATION OF FINE-GRAIN PARALLELISM IN LOGIC LANGUAGES ON MASSIVELY-PARALLEL ARCHITECTURES

被引:0
|
作者
KIM, H
GAUDIOT, JL
机构
关键词
LOGIC PROGRAMMING;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Logic programming has been drawing increasing attention as a parallel programming paradigm due to its ease of programming. However, an important question remains: Can logic programs achieve scalable performance on general-purpose massively parallel architectures? The problem is to determine how to efficiently incorporate parallelism in logic programs within the architectural features of such machines. We frame the question by identifying important issues that are crucial for scalable performance. We have systematically developed the logical organization of a parallel execution model based upon data-driven principles of execution. In this paper, we present some details of the model, particularly its fine-grain parallelism support and the self-scheduled inference as the basis for its distributed implementation.
引用
收藏
页码:225 / 234
页数:10
相关论文
共 50 条
  • [1] Architectures for fine-grain parallelism
    不详
    EXPLOITATION OF FINE-GRAIN PARALLELISM, 1995, 942 : 8 - 17
  • [2] Architectural support for exploitation of fine-grain parallelism
    不详
    EXPLOITATION OF FINE-GRAIN PARALLELISM, 1995, 942 : 32 - 37
  • [3] Exploiting fine-grain thread parallelism on multicore architectures
    Hadjidoukas, P. E.
    Philos, G. Ch.
    Dimakopoulos, V. V.
    SCIENTIFIC PROGRAMMING, 2009, 17 (04) : 309 - 323
  • [4] PROGRAMMING MASSIVELY-PARALLEL ARCHITECTURES WITH SEQUENTIAL OBJECT-ORIENTED LANGUAGES
    JEZEQUEL, JM
    BERGHEUL, F
    ANDRE, F
    FUTURE GENERATION COMPUTER SYSTEMS, 1994, 10 (01) : 59 - 70
  • [5] PROGRAMMING MASSIVELY-PARALLEL ARCHITECTURES WITH SEQUENTIAL OBJECT-ORIENTED LANGUAGES
    JEZEQUEL, JM
    BERGHEUL, F
    ANDRE, F
    LECTURE NOTES IN COMPUTER SCIENCE, 1992, 605 : 329 - 344
  • [6] Data access partitioning for fine-grain parallelism on multicore architectures
    Chu, Michael
    Ravindran, Rajiv
    Mahlke, Scott
    MICRO-40: PROCEEDINGS OF THE 40TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, 2007, : 369 - +
  • [7] EXPLOITING FINE-GRAIN PARALLELISM ON DATA-FLOW ARCHITECTURES
    GAO, GR
    PARALLEL COMPUTING, 1990, 13 (03) : 309 - 320
  • [8] COMPILING FOR MASSIVELY-PARALLEL ARCHITECTURES - A PERSPECTIVE
    FEAUTRIER, P
    MICROPROCESSING AND MICROPROGRAMMING, 1995, 41 (5-6): : 425 - 439
  • [9] FINE-GRAIN PARALLEL COMPUTER ARCHITECTURES IN FUTURE TRIGGERS
    LONE, S
    BOCK, RK
    ERMOLIN, Y
    KRISCHER, W
    LJUSLIN, C
    ZOGRAFOS, K
    SANDOVAL, A
    NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, 1990, 288 (2-3): : 507 - 516
  • [10] Understanding Scalability and Fine-Grain Parallelism of Synchronous Data Parallel Training
    Li, Jiali
    Nicolae, Bogdan
    Wozniak, Justin
    Bosilca, George
    PROCEEDINGS OF 2019 5TH IEEE/ACM WORKSHOP ON MACHINE LEARNING IN HIGH PERFORMANCE COMPUTING ENVIRONMENTS (MLHPC 2019), 2019, : 1 - 8