ANALYSIS OF GAP-TOLERANT BUBBLE CIRCUITS

被引：3
|
作者：
DELLATORRE, E
ISHAK, WS
机构：
[1] MCMASTER UNIV,DEPT ELECT ENGN,HAMILTON L8S 4L8,ONTARIO,CANADA
[2] MCMASTER UNIV,SIMULAT OPTIMIZAT & CONTROL GRP,HAMILTON L8S 4L8,ONTARIO,CANADA
来源：
IEEE TRANSACTIONS ON MAGNETICS | 1979年 / 15卷 / 03期
关键词：
D O I：
10.1109/TMAG.1979.1070328
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：1026 / 1031
页数：6
相关论文
共 50 条
  • [31] HYDROGEN BUBBLE LAYERS IN THE ECM GAP
    SEIMIYA, K
    KIKUCHI, K
    JOURNAL OF MECHANICAL ENGINEERING LABORATORY, 1979, 33 (04): : 209 - 218
  • [32] FIELD OF PROPAGATING CIRCUITS OF BUBBLE-DEVICES
    WANAS, MA
    JOURNAL OF PHYSICS D-APPLIED PHYSICS, 1976, 9 (05) : 811 - 818
  • [33] Probabilistic analysis and design of metallic-carbon-nanotube-tolerant digital logic circuits
    Zhang, Jie
    Patil, Nishant P.
    Mitra, Subhasish
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2009, 28 (01) : 1307 - 1320
  • [34] A UNIFIED NEGATIVE-BINOMIAL DISTRIBUTION FOR YIELD ANALYSIS OF DEFECT-TOLERANT CIRCUITS
    KOREN, I
    KOREN, Z
    STAPPER, CH
    IEEE TRANSACTIONS ON COMPUTERS, 1993, 42 (06) : 724 - 734
  • [35] Fault Tolerant Design and Analysis of Carbon Nanotube Circuits Affixed on DNA Origami Tiles
    Czeizler, Eugen
    Orponen, Pekka
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2015, 14 (05) : 871 - 877
  • [36] Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits
    Zhang, Jie
    Patil, Nishant P.
    Mitra, Subhasish
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2009, 28 (09) : 1307 - 1320
  • [37] Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits
    Wey, I-Chyn
    Chen, You-Gang
    Wu, An-Yeu
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2008, 16 (12) : 1708 - 1712
  • [38] Designing radiation-tolerant integrated circuits
    Bouldin, D
    IEEE CIRCUITS & DEVICES, 2002, 18 (02): : 5 - 6
  • [39] A Fault Tolerant Method for Residue Arithmetic Circuits
    Forsati, Rana
    Faez, Karim
    Moradi, Farnaz
    Rahbar, Afsaneh
    2009 INTERNATIONAL CONFERENCE ON INFORMATION MANAGEMENT AND ENGINEERING, PROCEEDINGS, 2009, : 59 - +
  • [40] NBTI/PBTI tolerant arbiter PUF circuits
    Suzuki, Koyo
    Miura, Katsuyoshi
    Nakamae, Koji
    2017 IEEE 23RD INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS), 2017, : 80 - 84
12345